The present disclosure relates to a solid-state imaging device and electronic equipment such as a camera provided with the solid-state imaging device.
As a solid-state imaging device, there is an amplification type solid-state imaging device represented by an MOS-type image sensor such as a CMOS (Complementary Metal Oxide Semiconductor). In addition, there is a charge-transfer type solid-state imaging device represented by a CCD (Charge Coupled Device) image sensor. The solid-state imaging devices are widely used in digital still cameras, digital video cameras, and the like. In recent years, as a solid-state imaging device mounted on mobile equipment including mobile telephones with camera, PDAs (Personal Digital Assistants), and the like, the MOS-type image sensor is widely used in the light of power consumption as the voltage of the power supply is low.
Such an MOS-type solid-state imaging device is formed of a photodiode of which a unit pixel serves as a photoelectric conversion unit and a plurality of pixel transistors, and is configured to have a pixel array in which a plurality of unit pixels is arrayed in a two-dimensional array shape (pixel area) and the peripheral circuit area. The plurality of pixel transistors is formed with MOS transistors, and configured to include three transistors of a transfer transistor, a reset transistor, an amplification transistor, or four transistors by adding a selection transistor thereto.
In such MOS-type solid-state imaging devices of the related art, solid-state imaging devices have been variously proposed, which is configured to be one device by electrically connecting a semiconductor chip, in which a pixel array arranged with a plurality of pixels is formed, and a semiconductor chip, in which a logic circuit performing signal processing is formed. For example, in Japanese Unexamined Patent Application Publication No. 2006-49361, a semiconductor module is disclosed, in which a backside illumination type image sensor chip having micro-pads for each pixel cell and a signal processing chip having micro-pads formed with a signal processing circuit are connected to each other by micro-bumps.
In International Publication No. WO 2006/129762, a semiconductor image sensor module is disclosed, in which a first semiconductor chip provided with an image sensor, a second semiconductor chip provided with an analog/digital converter array, and a third semiconductor chip provided with a memory element array are stacked. The first semiconductor chip and the second semiconductor chip are connected by a bump that is a conductive connection conductor. The second semiconductor chip and the third semiconductor chip are connected by a penetration contact which penetrates the second semiconductor chip.
As shown in Japanese Unexamined Patent Application Publication No. 2006-49361, and the like, a technique of mounting different kinds of circuit chips including an image sensor chip, a logic circuit performing signal processing, and the like by mixing has been variously proposed. In the related art, a through connection hole is formed in a state where functional chips are almost completed and connects the chips to each other, or the chips are connected to each other by a bump.
SUMMARY
The present applicant previously proposed a solid-state imaging device where a semiconductor chip unit provided with a pixel array and a semiconductor chip unit provided with a logic circuit are bonded together so as to satisfactorily exhibit performance of each unit, intending high performance, mass production, and cost reduction. The solid-state imaging device is made such that a first semiconductor chip unit provided with a pixel array in a half-processed state and a second semiconductor chip unit provided with a logic circuit are bonded together, the first semiconductor chip unit is made into a thin film, and the pixel array and the logic circuit are connected to each other. The connection is attained by forming a connection conductor which is connected to necessary wires of the first semiconductor chip unit, a penetrating connection conductor which penetrates the first semiconductor chip unit and is connected to necessary wires of the second semiconductor chip unit, and connection wires constituted by a coupling conductor which couples both connection conductors. Then, the device is made into a chip in a finished product state and configured as a backside illumination type solid-state imaging device.
In the solid-state imaging device, the connection conductor and the penetrating connection conductor are formed so as to be buried in a through hole that penetrates a silicon substrate of the first semiconductor chip unit via an insulating film. The traverse areas of the connection conductor and the penetrating connection conductor are relatively large. For this reason, when it is difficult to ignore parasitic capacity occurring between the connection conductor and the penetrating connection conductor and the silicon substrate, it was found that the parasitic capacity causes a reduction in the driving speed of circuits and contributes to hindrance of high performance of the solid-state imaging device.
Furthermore, in the solid-state imaging device with the configuration in which bonded semiconductor chip units are connected by the connection conductor and the penetrating connection conductor, each wire corresponding to each vertical signal line (in other words, a drawing wire) is connected to the above-described paired conductors (the connection conductor and the penetrating connection conductor). In that case, capacity at the ground and adjacent coupling capacity, which are parasitic capacity, occur. The capacity at the ground is parasitic capacity between wires and a semiconductor substrate that has, for example, a ground potential. The adjacent coupling capacity is parasitic capacity between adjacent drawing wires or between adjacent paired conductors. The capacity at the ground can be resolved if power supply is reinforced, or a current is made to run by providing a buffer circuit. However, it is not possible to resolve the adjacent coupling capacity because there is interference between adjacent columns.
It is desirable to provide a solid-state imaging device which suppresses at least the adjacent coupling capacity and has high performance. In addition it is desirable to provide electronic equipment such as a camera provided with the solid-state imaging device.
According to an embodiment of the present disclosure, there is provided a backside illumination type solid-state imaging device which includes stacked semiconductor chips which are formed such that two or more semiconductor chip units are bonded to each other, at least a first semiconductor chip unit is formed with a pixel array and a first multi-layered wiring layer, and a second semiconductor chip unit is formed with a logic circuit and a second multi-layered wiring layer. Furthermore, the disclosure includes a connection wire which connects the first semiconductor chip unit and the second semiconductor chip unit and a first shield wire which shields adjacent connection wires in one direction therebetween. The connection wire includes a connection conductor which is connected to a first connection pad connected to a necessary first wire in the first multi-layered wiring layer, a penetrating connection conductor which penetrates the first semiconductor chip unit and is connected to a second connection pad connected to a necessary second wire in the second multi-layered wiring layer. Furthermore, the connection wire is formed including a coupling conductor which couples the connection conductor and the penetrating connection conductor. The first shield wire is formed with a wiring in a necessary layer in the first multi-layered wiring layer and/or the second multi-layered wiring layer. The solid-state imaging device of the disclosure is configured as a backside illumination type solid-state imaging device.
In the solid-state imaging device of the embodiment of the disclosure, the first shield wire which shields adjacent connection wires in one direction therebetween is included, and the first shield wire is formed with a wiring in a necessary layer in the first multi-layered wiring layer and/or the second multi-layered wiring layer, whereby it is possible to suppress adjacent coupling capacity. In addition, since the first shield wire is formed using the wiring in the multi-layered wiring layer without increasing the number of wiring processes, the configuration is simplified and a solid-state imaging device of that kind is easily manufactured.
As a preferable embodiment of the solid-state imaging device according to the disclosure, the solid-state imaging device may further include a second shield wire which shields the connection wire and the first wire and the second wire connected to another connection wire adjacent thereto. The second shield wire may be formed with a wiring in a necessary layer in the first multi-layered wiring layer and the second multi-layered wiring layer.
In the solid-state imaging device of the embodiment of the disclosure, adjacent coupling capacity between adjacent connection wires is suppressed by the first shield wire, and a second shield wire shields the connection wire and the first wire and the second wire connected to another wire adjacent thereto therebetween. The second shield wire is also formed with a wiring in a necessary layer in the first multi-layered wiring layer and the second multi-layered wiring layer. Accordingly, it is possible to suppress the whole adjacent coupling capacity between adjacent connection wires and between the connection wire and the first and the second wires adjacent thereto.
According to another embodiment of the present disclosure, there is provided a backside illumination type solid-state imaging device which includes stacked semiconductor chips which are formed such that two or more semiconductor chip units are bonded to each other, at least a first semiconductor chip unit is formed with a pixel array and a first multi-layered wiring layer, and a second semiconductor chip unit is formed with a logic circuit and a second multi-layered wiring layer. Furthermore, the disclosure includes a connection wire which connects the first semiconductor chip unit and the second semiconductor chip unit and a second shield wire which shields a first wire and a second wire connected to another connection wire adjacent thereto therebetween. The connection wire includes a connection conductor which is connected to a first connection pad connected to a necessary first wire in the first multi-layered wiring layer, a penetrating connection conductor which penetrates the first semiconductor chip unit and is connected to a second connection pad connected to a necessary second wire in the second multi-layered wiring layer. Furthermore, the connection wire is formed including a coupling conductor which couples the connection conductor and the penetrating connection conductor. The second shield wire is formed with a wiring in a necessary layer in the first multi-layered wiring layer and the second multi-layered wiring layer. The solid-state imaging device of the disclosure is configured as a backside illumination type solid-state imaging device.
In the solid-state imaging device of the embodiment of the disclosure, since the second shield wire is included between the connection wire and the first wire and the second wire connected to another connection wire adjacent thereto, it is possible to easily suppress adjacent coupling capacity between the connection wire and the first and the second wires. In addition, since the second shield wire is formed using the wiring in a multi-layered wiring layer without increasing the number of wiring processes, the configuration is simplified and a solid-state imaging device of this kind is easily manufactured.
According to still another embodiment of the disclosure, there is provided electronic equipment which includes a solid-state imaging device, an optical system which guides incident light to a photoelectric conversion unit of the solid-state imaging device, and a signal processing circuit which processes output signals of the solid-state imaging device. The solid-state imaging device includes stacked semiconductor chips which are formed such that two or more semiconductor chip units are bonded to each other, at least a first semiconductor chip unit is formed with a pixel array and a first multi-layered wiring layer, and a second semiconductor chip unit is formed with a logic circuit and a second multi-layered wiring layer; a connection wire which connects the first semiconductor chip unit and the second semiconductor chip unit; and a first shield wire which shields adjacent connection wires in one direction therebetween, in which the connection wire includes a connection conductor which is connected to a first connection pad connected to a necessary first wire in the first multi-layered wiring layer, a penetrating connection conductor which penetrates the first semiconductor chip unit and is connected to a second connection pad connected to a necessary second wire in the second multi-layered wiring layer, and a coupling conductor which couples the connection conductor and the penetrating connection conductor, and the first shield wire is formed with a wiring in a necessary layer in the first multi-layered wiring layer and/or the second multi-layered wiring layer.
In the electronic equipment of the embodiment of the disclosure, it is possible to suppress adjacent coupling capacity between adjacent connection wires in the solid-state imaging device, and/or between the connection wire and the first and the second wires connected to another connection wire adjacent thereto.
According to the solid-state imaging device according to the embodiments of the disclosure, it is possible to suppress coupling capacity between adjacent connection wires and/or coupling capacity between the connection wire and the first and the second wires connected to another connection wire adjacent thereto, and to provide a solid-state imaging device with high performance.
According to the electronic equipment according to the embodiments of the disclosure, it is possible to provide electronic equipment such as a high-quality camera by being provided with a backside illumination type solid-state imaging device which includes bonded chips and aims at high performance by suppressing adjacent coupling capacity.